Monday, 5 September 2016

VHDL Simulation

Visionics India Pvt Ltd, Technopark Trivandrum offers  workshop in " VHDL Design and Simulation " for B.Tech(ECE,EEE,EIE,AEI)/ Diploma/ M.Sc,B.Sc graduates.The workshops will expose participants to not just the theoretical aspects – from fundamental to advanced levels – but also equip them practically. 

Workshop Contents

  • Introduction to VHDL
  • Basic Terminologies in VHDL

    • Library
    • Entity
    • Architecture

  • Operators in VHDL

    • Logical Operators
    • Relational Operators
    • Shift Operators
    • Addition Operators
    • Multiplication Operators

  • VHDL Statements

    • Sequential Statements
    • Concurrent Statements

  • Behavioral and Data Flow model

      • VHDL Simulation
      • Basic gates/universal gates
      • Combinational Circuits (Half adder/Half subtractor)
      • Multiplexer/De-multiplexer
      • Decimal to Binary encoder

      • Request For Workshop : Universities/Students can request for a workshop by sending their needs to

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